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M61251AFP
Single-chip NTSC TV signal processor
REJ03F0078-0100Z Rev.1.0 Sep.22.2003
Description
The M61251AFP is a single-chip TV-signal processor IC for the NTSC format and is ideal for use in combination with a microcomputer. Processing circuits for all signals, including intermediate-frequency video and audio, video, color, the on-screen display of characters, and the deflection system are all included, and various functions are controllable via an I2C bus. Furthermore, a reset circuit, clock circuit, and regulator are included for use with microcomputers.
Features
* * * * * * * * * * * * * * Handling of VIF does not require a VCO coil Adjustment-free audio demodulator PLL-SPLIT SIF system with FM radio function Supports component video-signal input Fsc output available ACL or ABCL is selectable Built-in horizontal oscillator Built-in sawtooth waveform generator for vertical sync Self-diagnostic function Built-in black-peak hold, AFC2, color killer filter Horizontal / vertical pulse output for OSD Built-in microcomputer reset circuit Built-in microcomputer clock output Built-in 5- and 8-V regulators
Rev.1.0, Sep.22.2003, page 1 of 15
M61251AFP
Block diagram
Rev.1.0, Sep.22.2003, page 2 of 15
M61251AFP
Pin configuration
55 VIF VCO FEED BACK 54 FM DIRECT OUT 64 VIF IN(2) 63 VIF IN(1) 62 VIF AGC FILTER1 61 VIF AGC FILTER2 60 VIF APC FILTER
AUDIO BYPASS INTERCARRIER OUT
EXT AUDIO IN
59 58 57 56
SIF GND
V RAMP CAP AFT OUT VIF Vcc SIF Vcc RAMP OUT V RAMP F/B AFC FILTER DEF GND LOGIC GND FBP IN H OUT DEF Vcc NC R OUT G OUT B OUT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
17 20 22 23 24 25 26 27 28 29 18 19 21 31 32 30
53 52 51 50 49
AUDIO OUT
VIF GND
5.7V REG OUT
RF AGC OUT
VIDEO OUT
48 LIMITER IN 47 8.7V REG OUT 46 Cr IN 45 44 43 42 41
Cb IN Hi Vcc AUDIO ATT FILTER VREG Vcc TV/Y IN
M61251AFP
40 VIDEO/CHROMA Vcc 39 DRIVE Vcc 38 EXT/C IN 37 CHROMA APC FILTER 36 VIDEO/CHROMA GND 35 DRIVE GND 34 X-TAL 3.58 33 ACL/ABCL
INVERTED FBP OUT V PULSE OUT
INTELLIGENT MONITOR
Absolute maximum, ratings
Symbol Vcc Pd Kt Topr Tstg Parameter Supply voltage Power dissipation Thermal derating Operating temperature Storage temperature Ratings 6.0, 10.0 1325 10.6 -20 to + 65 -40 to +150 Unit V mW mW / C C C
Recommended operating conditions
Supply-voltage terminals Pins 3 and 4 Pins 39 and 40 Pin 12 Pin 44 Pin 42 GND terminals Pins 56 and 57 Pins 35 and 36 Pins 8 and 9 Blocks VIF / SIF Video, chroma Deflection/CMOS (start - up Vcc) SIF/ATT, deflection, RGB Power supply Blocks VIF / SIF Video, chroma Deflection, CMOS Voltage 5.0 V 5.0 V 8.0 V 8.0 V 8.7 V
Rev.1.0, Sep.22.2003, page 3 of 15
MCU 5.7V REG OUT
CLOCK CONTROL
FSC OUT1 MCU RESET
SDA SCL
B IN G IN
HVCO FEED BACK
P-ON CONTROL
Y SW OUT
FAST BLK
R IN
M61251AFP
Electrical characteristics
Function VIF Block IF amplifier Video detector Parameter Gain-control range Input impedance Video output level I2C video-output gain range Video S / N Video frequency response DG / DP Intermodulation VCO Frequency IIC "VIF VCO ADJ" Range Capture range IF AGC range Output range I2C RF delay adj. range Output range Sensitivity 2 I C output Specification (typ.) 45 to 108dB 2 k, 5pF 1.2 Vpp + / - 0.1 Vpp 54 dB 6 MHz 3% / 3deg 50 dB 45.75 / 58.75 MHz + / -4 MHz + / -2 MHz 45 to 107 dB 0.3 to 4.7 V 60 to 110 dB 0.3 to 4.7 V 10 mV / KHz Below 100 kHz Between 100 kHz and f0 Between f0 and +100 kHz Over +100 kHz 43 dB 4.5 MHz +/ -1.0 MHz 500 mVrms 60 dB 55 dB 1% -70 to 0 dB -70 dB 51 - I2C: 6bit - - 59 I2C: 7bit 2 - I2C "AFTO / AFT1" Pin no. 63.64 58 Negative sync. I2C: 3 bits Condition
-3dB
PLL IF AGC RF AGC AFT
SIF
Limiter FM detector AF amplifier
Limiting sensitivity PLL capture range FM Direct output level (TV) AF S/N AMR Distortion (T.H.D)
48 - 54 Input 4.5 MHz / 25 KHz 100dB
Audio ATT
Control range TV / EXT crosstalk
Rev.1.0, Sep.22.2003, page 4 of 15
M61251AFP
Electrical characteristics (cont)
Function Video Block Video switch Chroma trap Parameter TV / EXT crosstalk Center frequency Suppression at subcarrier frequency (fsc) Suppression at fsc+/-100 kHz Suppression at fsc+/-500 kHz Trap fine adjustment Video tone Delay time Peak frequency for emphasis Control range Delay-time adjustment Delay fine adjustment Start Point End Stop Max. effect Gain Y SW LPF cut-off frequency Mute suppression (Y) Center frequency 2 - MHz suppression ACC range Overload fo fsc out 1 level - 1 fsc out 1 level - 2 APC Color killer detector Demodulator Pull - IN Color killer level Suppression Tint control Demodulation angle Carrier leakage Demodulation ratio 125 ns 2.5 MHz -2.5 to +10dB 125 / 250 / 400 / 550nsec 0 / 80nsec 60 I RE 8 IRE 6dB (25 IRE) 6dB 700 KHz -45dB 3.58 MHz -22 dB +6 to -22 dB chroma 169% 3.579545 MHz 1Vpp OFF + / -600 Hz -45dB -40dB +/- 45deg 103deg / 95deg -40dB (B - Y) : (R -Y) = 1:0.55 14, 15, 16 - - I2 C 7bit I2 C"C Angle 95" - I2C: 6 bits I2C: 2 bits I2C: 1 bit Specification (typ.) -55dB 3.58 MHz -30dB -25dB -10dB I2C: 2bits Pin no. 31 - Condition at 5 MHz
Delay line Black stretch
- -
Y SW OUT Video mute Chroma Chroma BPF ACC VCXO
31 I2C "Y SW LPF" : 1 14. 15. 16 - - 14, 15, 16 29 Pin25 CLK CONT : High Pin25 CLK CONT : Low APC Filter 1F+4.7K//0.015F
Rev.1.0, Sep.22.2003, page 5 of 15
M61251AFP
Electrical characteristics (cont)
Function RGB Block Matrix Parameter Color control Max. attenuation Input level OSD speed (rise) OSD speed (fall) Contrast control Brightness control Drive control Cut-off RGB OUT Range of control Range of control Specification (typ.) Pin no. 14, 15, 16 -45dB Digital: 1 Vp-p Analog: 0.7 Vp-p 0.02s 0.02s -40 to 3dB External control -0.85 to + 0.85 V External control + / -3dB (R / B) +0.9 to -0.9 V 2.4 V Less than 300 mW 100% 0.3 V 4.2 V Low reset 4 mA 8.7 V 5.7 V 2.5 mA 5.7 V 5 mA 8.7 V 0V 1 mA 47 49 Pin 28 (Power on control) = 5V Pin 28 (Power on control) = 5V Pin 28 (Power on control) = 0V 42 32 30 14, 15, 16 33 14, 15, 16 33 14, 16 14, 15, 16 14, 15, 16 Open emitter output I2C: 7 bits Decoupling 0.1 F I2C: 8 bits De-coupling 0.1 F I2C: 7 bits 21, 22, 23 Condition I2C: 7 bits B / W mode at I2C data = 0 I2C Analog OSD"
External RGB
Range of control Range of control Output pedestal voltage Distribution of output voltage Clamp ability Output blanking voltage
MCU reset
Reset
Pin 32 voltage detection Reset polarity Maximum sink current Supply voltage (P-ON) Output voltage Maximum output current Output voltage Maximum output current
Power supply
VREG Vcc MCU 5.7 V REGOUT 5.7 V REGOUT
8.7 REGOUT
Output voltage 1 Output voltage 2 Maximum output current
Rev.1.0, Sep.22.2003, page 6 of 15
M61251AFP
Electrical characteristics (cont)
Function Deflection Block Sync. separation Horizontal VCO Parameter Slice level Horizontal VCO free-running frequency Horizontal VCO adjustment AFCI Horizontal phase Horizontal pull-in range Range of control Horizontal pulse timing Horizontal pulse width Inverter FBP OUT Vertical count down Output range Vertical freerunning frequency Vertical pull - in range Vertical position adjustment Vertical position step V-ramp variable range V-pulse width (pulse mode) V-BLK width (pulse mode) I2C bus I2C bus Acknowledge current SCL/SDA Vth (high) SCL/SDA Vth (low) Clock frequency Specification (typ.) 50% / 25% 50% / 45% 15.734 KHz Pin no. - 11 Condition I2C "S SiliceDown1" I2C "S SiliceDown2"
fH+ / -500 KHz +/-500 Hz (normal) +/-800 Hz (fast) +/-1.6s 8.5s 25s 0.1 to 5.0 V 60 Hz 55 to 67 Hz 8 Positions 2Horizontal Line / Step 2 Vpp +/- 0.8Vpp 0.5ms 1.5ms 5 mA 0.75 V 4.25 V 100 KHz 26, 27 19 5 11 11
2 I C: 3 bits
Filter 1uF 6.2 K / 0.01 uF I2C: 5 bits
2 I C: 3 bits
2 I C: 7 bits
Bus table
Slave address = BAH (write), BBH (read)
A6 1 A5 0 A4 1 A3 1 A2 1 A1 1 A0 1 R/W 1/0
Rev.1.0, Sep.22.2003, page 7 of 15
M61251AFP Write table (input bytes)
SUB ADDRESS HEX 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH BIN 00000000 00000001 00000010 00000011 00000100 00000101 00000110 00000111 00001000 00001001 00001010 00001011 00001100 00001101 00001110 00001111 00010000 00010001 00010010 00010011 00010100 00010101 00010110 00010111 00011000 00011001 00011010 00011011 00011100 D7 (inhibited) 0 (inhibited) 0 Video Mute 0 Audio Mute 0 ABCL Gain 0 EXTRGB C. Clip V0 1 VIF Defeat 0 Blue Back V0 HV BLK OFF 0 V1 (inhibited) 0 (inhibited) 0 1 1 1 White Back 0 (inhibited) 0 0 H-free 0 0 AFC1 Gain 0 1 YUV SW 0 Test1 0 BGPFBP OFF 0 Test3 0 0 0 0 0 0 0 0 0 0 (inhibited) 0 (inhibited) 0 0 0 0 0 00H 0 0 0 0 00H 0 0 Test2 0 0 0 0 (inhibited) 0 0 0 00H 0 0 0 (inhibited) 0 0 0 00H V1 V0 V0 0 Monitoring 0 V. 1Windows 0 0 AFC2 Gain 0 0 0 YSW LPF 0 0 OSD level 0 FBP Vth L 0 1 0 Baseband Tint Control V0 (inhibited) 0 0 0 00H 0 H Start 0 0 Analog OSD 0 0 0 Service SW 0 0 0 0 US/JPN SW 0 AFC2 H Phase 0 V0 0 V0 0 V0 90H 40H 0 S.Slice Down2 S.Slice Down1 1 1 0 0 1 0 0 0 V-free 0 1 0 0 0 0 0 0 0 0 (inhibited) 0 0 V-Size 0 Gamma Control 0 0 0 V Shift 0 (inhibited) 1 Killer level 0 00H 03H 0 00H 0 0 20H 00H TRAP Fine Adj 1 1 0 0 V1 VOUT STOP 0 V0 V0 FSC FREE 0 V0 V0 HTONE SW 0 V0 0 Brightness Control V0 DRIVE (R) 0 DRIVE (B) 0 Cut Off (R) 0 Cut Off (G) 0 Cut Off (B) 0 0 0 H VCO Adj 0 0 24H 0 80H 0 0 0 80H 0 0 0 80H 0 0 0 40H 0 0 0 40H V0 V0 V0 80H 1 V1 V0 V0 V1 VIF Video Out Gain 0 0 V0 V0 Y/C V0 0 AFT Defeat 0 V1 V0 V0 Contrast Control V0 EXT V0 Tint Control V0 Color Control V0 V0 (inhibited) 0 0 04H V0 V0 40H V0 Y DL Fine Adj 0 V0 0 V0 V0 V0 0 V0 40H 80H 40H Y DL Time Adj 0 0 1 VIFFreq5875 0 Audio EXT 0 1 C. Clip level 0 0 TRAP Off 0 0 Video T Sharp 0 Audio ATT 0 Video Tone V0 V0 V0 20H 0 0 0 00H 0 0 D6 D5 D4 DATA D3 RF Felay Adj 0 VIF VCD ADJ 0 ABCL 0 0 Black Stre. Off 0 0 Take Off 0 00H 20H 0 0 0 40H D2 D1 D0 INITIAL
Black Strech Discharge
Black Strech Charge
VSYNCDET Auto Slice down
NOTE: V0/V1 ==> V-LATCH BIT
Read table (output bytes)
SUB ADDRESS 00H 00000000 D7 KILLERB D6 (not assigned) D5 STPETB D4 VCOINB D3 AFT 0 D2 AFT 1 D1 HCOINB D0 (not assigned)
Rev.1.0, Sep.22.2003, page 8 of 15
M61251AFP
Bus table
Write
Function V RF delay I adjustment F VIF VCO adjustment VIF frequency 58, 75 VIF video out gain AFT defeat VIF defeat S Audio I attenuation F Audio EXT Audio mute Bit 7 6 1 3 1 1 7 1 1 Subaddress 00H 10H 01H 06H 04H 07H 03H 02H 03H Data D0 to D6 D0 to D5 D6 D5 - D7 D6 D7 D0 to D6 D6 D7 Description RF AGC delay point adjustment VIF VCO free-run frequency adjustment (VIF defeat = 1, AFT output: center) IF output at 45.75 / 58.75 MHz. 0: 45.75 MHz, 1: 58.75 MHz Adjustment of output level for VIF-demodulated video waveform on pin 58 AFT output on / off (defeat). 0: AFT on (non defeat), 1: defeat VIF gain normal/minimum. 0: AGC function, 1: defeat (minimum gain) Pin 51 audio-output level adjustment Switches between the internal and externalinput audio signals. 0: internal, 1: external Pin 54 audio direct output on / off (mute). 0: audio on (no mute), 1: mute Initial value 40H 20H 0 80H 0 0 00H 0 0 Note
Rev.1.0, Sep.22.2003, page 9 of 15
M61251AFP Write (Cont)
Function V I D E O Video tone Contrast control EXTRGB contrast clip C. clip level Y delay time adjustment Y delay fine adjustment EXT Y/C Y SW LPF Bit 6 7 1 1 2 1 1 1 1 Subaddress 04H 05H 05H 02H 06H 06H 06H 06H 13H Data D0 to D5 D0 to D6 D7 D5 D0 to D1 D2 D3 D4 D5 Description Sharpness level control Contrast level control EXT RGB contrast lower limit clipping on/off. 0: clipping on, 1: clipping off EXT RGB contrast lower-limit clipping level. 0: low (20H), 1: high (40H) Y signal delay adjustment Y signal delay fine adjustment Selects video input on pin 41 or 38. 0: pin 41, 1: pin 38 Selects composite input or YC on pin 38 or 41. 0: composite, 1: Y / C mode Pin 31 (Y SW OUT) output frequency characteristic. 0: flat, 1: LPF (fc = 700 kHz) Selects one of two video-tone levels (sharp or soft). 0: standard, 1: sharp Y-signal output on / off (video mute). 0: mute off, 1: mute Y-signal chroma trapping on / off. 0: trapping on, 1: trapping off Chroma-trapping frequency fine adjustment Black - stretch circuit on / off. 1: on, 1: off Adjustment of charge - time - constant for black stretch Adjustment of discharge - time - constant for black stretch Gamma-level adjustment Hue control YUV input hue control Switches between YUV and other input mode Color level control Chroma BPF take-off on / off, 0: BPF, 1: take-off US / JPN modes, 100: US mode, 011: JPN mode Color killer sensitivity, 0: 43 dB, 1: 45 dB Crystal oscillator circuit forced free-running mode. 0: off, 1: free-running Initial value 20H 40H 0 0 X0H 0 0 0 0 V Latch V Latch Note V Latch V Latch V Latch
Video tone sharpness Video mute TRAP off TRAP fine adjustment Black stretch off Black stretch charge Discharge Gamma control C H R O M A Tint control Baseband tint control YUV SW Color control Take off JS / JPN / SW Killer level Fsc free
1 1 1 2 1 2 2 2 7 7 1 7 1 1 1 1
02H 02H 02H 12H 02H 14H 14H 12H 07H 17H 17H 08H 02H 15H 15H 09H
D3 D7 D4 D0 - D1 D1 D4 - D5 D6 to D7 D2 to D3 D0 to D6 D0 to D6 D7 D0 to D6 D0 D1 to D3 D0 D5
0 0 0 X0H 0 0XH 0XH X0H 40H 40H 0 40H 0 0 0 0 V Latch V Latch V Latch
Rev.1.0, Sep.22.2003, page 10 of 15
M61251AFP Write (Cont)
Function R Brightness control G Drive (red) B Drive (blue) Cut-off (red) Cut-off (green) Cut-off (blue) Blue background White background ABCL ABCL gain On-screen display level Halftone SW Analog on-screen display Bit 8 7 7 8 8 8 1 1 1 1 1 1 1 Subaddress 0AH 0BH 0CH 0CH 0EH 0FH 08H 10H 02H 04H 15H 09H 15H Data D0 to D7 D0 to D6 D0 to D6 D0 to D7 D0 to D7 D0 to D7 D7 D7 D2 D7 D5 D4 D4 Description Brightness level control Red-output level control Blue-output level control Red-output DC-level control Green-output DC-level control Blue-output DC-level control Blue-background screen on / off. 1: off, 1: blue background White background on / off, 1: off, 1: white background ABCL on/off. 0: off, 1: ABCL on ABCL sensitivity low / high. 0: low, 1: high On-screen display level (70 / 90%). 0: 70%, 1: 90% Halftone on / off. 0: off, 1: on On-screen display digital / analog input. 0: digital, 1: analog Initial value 80H 40H 40H 80H 80H 80H 0 0 0 0 0 0 0 Note V Latch
Rev.1.0, Sep.22.2003, page 11 of 15
M61251AFP Write (Cont)
Function AFC2 horizontal D phase E Ramp stop F Service switch Horizontal start AFC1 gain AFC2 gain Horizontal VCO adjustment Vertical shift Vertical size Horizontal free Vertical free S slice down 1 S slice down 2 Auto slice down Bit 5 1 Subaddress 16H 09H Data D0 to D4 D6 Description Adjustment of horizontal phase of display Pin 5 VOUT (ramp / pulse) forcible stop mode (when stopped, pin 5 is at ground level). 0: VOUT, 1: stopped Vertical output on / off, 0: vertical output on, 1: vertical output off Horizontal output out / stopped. 0: stopped, 1: H OUT Horizontal AFC gain high / low. 0: low, 1: high Horizontal AFC2 gain high/low. 0: high, 1: low Adjustment of horizontal VCO freerunning frequency Adjustment of vertical ramp start timing Adjustment of vertical ramp amplitude Horizontal output forced free-run mode on/off. 0: off, 1: horizontal free-run Vertical output forced free-run mode on/off. 0: off, 1: vertical free-run Sync detection slice level (50 / 30%). 0: 50%, 1: 30% Sync detection slice level (50 / 40%), 0: 50%, 1: 40% Synchronous detection slice level during video period, 0: Slice level remains constant, 1: slice level decreased during video period Pin 10 (FBP in) FBP slice level. 0: Vth = 2 V (HBLK width: narrow), 1: Vth = 1 V (HBLK width: wide) Horizontal / vertical blanking. 0: blanking ON, 1: blanking OFF Minimum width for vertical sync detection. 0: synchronous detection width = 18 us, 1: synchronous detection width = 14 us Minimum width for vertical sync detection (1 / 2 windows). 0: 2 windows, 1: 1 window Internal BGP on / off when there is no FBP input. 0: BGP on, 1: BGP off Initial value 90H 0 Note
1 1 1 1 3 3 6 1 1 1 1 1
13H 13H 15H 15H 10H 13H 11H 13H 10H 14H 14H 16H
D3 D4 D7 D6 D0 to D2 D0 to D2 D0 to D5 D7 D6 D2 D3 D6
0 0 0 0 24H X0H 20H 0 0 0 0 0
FBP Vth L
1
16H
D5
0
HV BLK OFF Vertical sync. detection
1 1
09H 16H
D7 D7
0 90H
One window
1
13H
D6
0
BGPFBP off
1
19H
D7
0
Rev.1.0, Sep.22.2003, page 12 of 15
M61251AFP Write (Cont)
Function Monitoring Test 1 Test 2 Test 3 Bit 4 1 2 2 Subaddress 12H 18H 19H 1AH Data D4 to D7 D6 to D7 D6 D6 to D7 Description Pin 18 intelligent monitoring mode switch Reserved (test bit) Reserved (test bit) Reserved (test bit) Initial value 0XH 0 0 0 Note
Rev.1.0, Sep.22.2003, page 13 of 15
M61251AFP Read:
KILLERB 1 00H D7 Color killer information output; 1 when killer is off. AFTO 1 00H D3 AFT information output (note 1) AFT1 1 00H D2 AFT information output (note 1) HCOINB 1 00H D1 Horizontal sync detection, not synchronized = 1 VCOINB 1 00H D5 Vertical sync detection, not detected = 1 STDETB 1 00H D4 Station detection in TV mode, not detected = 1 Note 1: AFT0 / AFT1, read byte: AFT OUTPUT
AFT0/AFT1

-100kHz
fo
+100kHz IF
AFT0 AFT1
1 1
0 1
0 0
1 0
Intelligent monitor
(1) Sub-address: 12H D4 to D7 (4 bits) (2) Output pin: pin 18 (3) Specifications
Decimal 0 1 2 5 6 7 8 9 10 11 12 13 14 Hexad ecimal 0X 1X 2X 5X 6X 7X 8X 9X AX BX CX DX EX Binary D7 0 0 0 0 0 0 1 1 1 1 1 1 1 D6 0 0 0 1 1 1 0 0 0 0 1 1 1 D5 0 0 1 0 1 1 0 0 1 1 0 0 1 D4 0 1 0 1 0 1 0 1 0 1 0 1 0 Composite sync AFT OUT (pin2) RF AGC OUT (pin59) TV / Y IN (pin41) G OUT (pin15) R OUT (pin14) B OUT (pin16) ACL (pin33) HOUT VIF VCC (pin10) VIF VCC (pin 3,4) START UP VCC (pin 12) VIDEO / CROMA VCC (pin 39 40) HI VCC (pin44) Output signal Vcc voltage 8V 5V 5V 5V 8V 8V 8V 5V 5V 8V 5V 8V 5V Specifications 0/5V 95 / 100 1 Vp-p (typ.) 1/2 1/2 1/2 0 dB 0/4V 0 / 4.75 V Positive sync. AC / DC AC DC DC AC AC AC AC DC AC AC AC DC DC
Positive sync.
1/3
15
FX
1
1
1
1
8V
1/3
DC
Rev.1.0, Sep.22.2003, page 14 of 15
64P6U-A
JEDEC Code -- MD HD Weight(g) Lead Material Cu Alloy
M61251AFP
MMP
Plastic 64pin 14 14mm body LQFP
EIAJ Package Code LQFP64-P-1414-0.8
b2
e
Package Dimensions
D
49
64
l2
48
E
16
33
17
32
HE
A2
A3
Lp
Detail F
c
y x
M
b
A1
Rev.1.0, Sep.22.2003, page 15 of 15
1
Recommended Mount Pad Symbol
A F L1
e
A A1 A2 b c D E e HD HE L L1 Lp
A3
L
x y b2 I2 MD ME
Dimension in Millimeters Min Nom Max -- -- 1.7 0.1 0.2 0 -- -- 1.4 0.32 0.37 0.45 0.105 0.125 0.175 13.9 14.1 14.0 13.9 14.1 14.0 0.8 -- -- 16.0 15.8 16.2 15.8 16.2 16.0 0.3 0.5 0.7 1.0 -- -- 0.45 0.6 0.75 -- 0.25 -- -- -- 0.2 0.1 -- -- 0 8 -- 0.5 -- -- -- -- 0.95 -- 14.4 -- -- -- 14.4
ME
Sales Strategic Planning Div.
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